infineon
•
2025-12-01
Villach, AT
Internship: Application of generative AI Technology for SystemVerilog code generation
A solid understanding of programming concepts and familiarity with Python programming language A basic understanding of IC digital design and verification and experience with SystemVerilog and UVM as a plus Previous experience with AI, machine learning, AI age…
infineon
•
2025-12-01
Villach, AT
Internship: Application of generative AI Technology for SystemVerilog code generation
A solid understanding of programming concepts and familiarity with Python programming language A basic understanding of IC digital design and verification and experience with SystemVerilog and UVM as a plus Previous experience with AI, machine learning, AI age…